FsDriveSdSpi.hpp

//------------------------------------------------------------------------------
//This file is part of embKernel. 
//See license.txt for the full license governing this code.
//------------------------------------------------------------------------------

#ifndef FS_DRIVE_SPI_HPP_
#define FS_DRIVE_SPI_HPP_

#include "FsDrive.hpp"
#include "RtosInclude.hpp"
#include "DrvSpi.hpp"

class FsDriveSdSpi: public FsDrive {
    friend class RtosInterrupt;

private:

    typedef struct {
        uint8_t cmdId :6;
        uint8_t cmdRsp :1;
        uint8_t start :1;
        uint8_t args[4];
        uint8_t stop :1; //lsb
        uint8_t crc :7;
    }__attribute__((packed)) CMD_RESP;

    typedef union {
        struct {
            uint8_t idle :1; //lsb
            uint8_t eraseReset :1;
            uint8_t illeagalCmd :1;
            uint8_t crcError :1;
            uint8_t eraseSeqError :1;
            uint8_t addressError :1;
            uint8_t parameterError :1;
            uint8_t zero :1;
        } bits;
        uint8_t value;
    }__attribute__((packed)) RESP_R1;

    typedef struct {
        uint8_t res1 :4;
        uint8_t cmdVersion :4;
        uint8_t res2;
        uint8_t voltageAccepted :4;
        uint8_t res3 :4;
        uint8_t checkPattern;
    }__attribute__((packed)) RESP_R7;

    typedef struct {
        uint8_t switchTo1_8Accepted;
    }__attribute__((packed)) OCR;

    typedef enum
        :uint8_t {
            START_SINGLE_BLOCK_WRITE = 0xFE,
        START_MULTIPLE_BLOCK_WRITE = 0xFC,
        STOP_TRANSMISSION = 0xFD,
    } CTRL_TOKEN;

    const static uint8_t RESP_R1_IDLE_VALUE = 0x01;

public:
    FsDriveSdSpi(DrvSpi* spi);
    ~FsDriveSdSpi();

private:
    static FsDriveSdSpi* sInstances[];

    DrvSpi* mSpi;
    RESP_R1 sendCmd(uint8_t cmd, uint32_t arg);
    bool waitReady();

    bool readDataBlock(uint8_t* buffer, unsigned int size);
    bool writeDataBlock(const uint8_t* buffer, unsigned int size, bool isMultipleBlock);
    bool internalInit();
    bool internalReadBlocks(FsDefs::SECTOR* buffer, unsigned int blockNumber, unsigned int blockCount);
    bool internalWriteBlocks(const FsDefs::SECTOR* buffer, unsigned int blockNumber, unsigned int blockCount);
protected:
    virtual bool init();
    virtual bool readBlocks(FsDefs::SECTOR* buffer, unsigned int blockNumber, unsigned int blockCount);
    virtual bool writeBlocks(const FsDefs::SECTOR* buffer, unsigned int blockNumber, unsigned int blockCount);

private:
    const static uint8_t CMD0_GO_IDLE_STATE = 0; //Resp   R1
    const static uint8_t CMD1_SEND_OP_COND = 1; //Resp    R1
    const static uint8_t CMD6_SWITCH_FUNC = 6; //Resp    R1
    const static uint8_t CMD8_SEND_IF_COND = 8; //Resp    R7
    const static uint8_t CMD9_SEND_CSD = 9; //Resp    R1
    const static uint8_t CMD10_SEND_CID = 10; //Resp    R1
    const static uint8_t CMD12_STOP_TRANSMISSION = 12; //Resp    R1b
    const static uint8_t CMD13_SEND_STATUS = 13; //Resp    R2
    const static uint8_t CMD16_SET_BLOCKLEN = 16; //Resp    R1
    const static uint8_t CMD17_READ_SINGLE_BLOCK = 17; //Resp    R1
    const static uint8_t CMD18_READ_MULTIPLE_BLOCK = 18; //Resp    R1
    const static uint8_t CMD24_WRITE_BLOCK = 24; //Resp   R1
    const static uint8_t CMD25_WRITE_MULTIPLE_BLOCK = 25; //Resp    R1
    const static uint8_t CMD27_PROGRAM_CSD = 27; //Resp   R1
    const static uint8_t CMD28_SET_WRITE_PROT = 28; //Resp   R1b
    const static uint8_t CMD29_CLR_WRITE_PROT = 29; //Resp    R1b
    const static uint8_t CMD30_SEND_WRITE_PROT = 30; //Resp   R1
    const static uint8_t CMD32_ERASE_WR_BLK_START_ADDR = 32; //Resp    R1
    const static uint8_t CMD33_ERASE_WR_BLK_END_ADDR = 33; //Resp   R1
    const static uint8_t CMD38_ERASE = 38; //Resp   R1b
    const static uint8_t CMD42_LOCK_UNLOCK = 42; //Resp   R1
    const static uint8_t CMD55_APP_CMD = 55; //Resp   R1
    const static uint8_t CMD56_GEN_CMD = 56; //Resp   R1
    const static uint8_t CMD58_READ_OCR = 58; //Resp    R3
    const static uint8_t CMD59_CRC_ON_OFF = 59; //Resp    R1
    const static uint8_t ACMD13_SD_STATUS = 13; //Resp   R2
    const static uint8_t ACMD22_SEND_NUM_WR_BLOCKS = 22; //Resp    R1
    const static uint8_t ACMD23_SET_WR_BLK_ERASE_COUNT = 23; //Resp   R1
    const static uint8_t ACMD41_SD_SEND_OP_COND = 41; //Resp   R1
    const static uint8_t ACMD42_SET_CLR_CARD_DETECT = 42; //Resp   R1
    const static uint8_t ACMD51_SEND_SCR = 51; //Resp   R1
};

#endif /* FS_DRIVE_SPI_HPP_ */